1. Field of the Invention
The present invention relates generally to an encoding apparatus and method in a communication system, and in particular, to an encoding apparatus and method in a CDMA communication system.
2. Description of the Related Art
Research has actively been made on high-rate transmission of frames in a CDMA (Code Division Multiple Access) mobile communication system. A system smith a channel structure for high-rate frame transmission is called an HDR (High Data Rate) system.
The HDR system transmits data frames at a fixed data rate or at a variable data rate. Since a data rate may be changed in variable rate services, the structure of frames (code rate, code repetition, etc.) determined by the transmission rate should be known to a receiver.
A so-called “RRI (Reverse Rate Indicator)” provides the structure of a frame currently being transmitted when frames are transmitted at different rates. Services at different rates are reliably provided by the RRI. An example RRI use is illustrated in FIG. 1.
FIG. 1 is a block diagram of a transmitter for a mobile station in a conventional CDMA system. It is assumed herein that the CDMA system is an HDR system, one transmission frame has 16 slots and 16 code symbols are transmitted in one slot (i.e., 256 code symbols are transmitted in one frame for transmission of an RRI).
Referring to FIG. 1, an encoder 100 encodes RRI information bits. For the input of three RRI bits, the encoder 100 outputs eight code symbols in 0s or 1s through (8, 3) orthogonal coding. A repeater 110 repeats the code symbols 32 times (each code symbol occurs 32 consecutive times) and outputs a total of 256 symbols (=32×8). A signal mapper 120 converts 0s and 1s to 1s and −1s, respectively. A multiplier 135 spreads the converted symbols by the converted chips (+1, +1, +1, +1) of Walsh code #0 of length 4 through multiplication and outputs the spread symbols in chip units. A multiplexer (MUX) 140 time-multiplexes the chip-basis symbols with other signals 1 and 2. The signals 1 and 2 can be DRC (Data Rate Control) information. An output signal I′ of the multiplexer 140 and a data signal Q′ are applied to the input of a complex spreader 150. The complex spreader 150 complex-multiplies the signals I′ and Q′ by PN spreading codes PNI and PNQ. That is, the complex spreader 150 multiplies an input signal (I′+jQ′) by a PN spreading code (PNI+jPNQ) and outputs a real component signal I and an imaginary component signal Q. Baseband filters 160 and 165 perform baseband filtering on the real component signal I and the imaginary component signal Q, respectively. Multipliers 170 and 175 multiply the real component signal I and the imaginary component signal Q received from the baseband filters 160 and 165 by carriers cos (2πfct) and sin (2πfct), respectively. A summer 180 sums the multiplication results and outputs the sum as a transmission signal.
FIG. 2 is a block diagram of a receiver which is the counterpart of the transmitter of FIG. 1 for a base station in the HDR CDMA system. It is assumed that a frame transmitted from the transmitter has 16 slots and 16 code symbols are transmitted for transmission of an RRI in one slot (i.e., 256 code symbols are transmitted in one frame).
Referring to FIG. 2, multipliers 270 and 275 multiply an input signal by cos (2πfct) and sin (2πfct), respectively. Matching filters 260 and 265 filter the multiplication results of the multipliers 270 and 275 and output matching-filtered signals I and Q. A complex despreader 250 despreads the signals I and Q to signals I′ and Q′. A demultiplexer 240 time-demultiplexes the signal I′ into other signals 1 and 2 and a signal for an RRI. An accumulator 235 accumulates the RRI signal on a 4-chip basis and outputs 256 symbols. A symbol accumulator 210 receives the accumulated symbols. The symbol accumulator 210 is the counterpart of the repeater 110 shown in FIG. 1. A decoder 200, the counterpart of the encoder 100 of FIG. 1, decodes eight symbols received from the symbol accumulator 210 and outputs RRI information bits. If the encoder 100 is an (8, 3) orthogonal encoder, the decoder 200 can calculate an inverse fast Hadamard transform.
Eight RRI values exist for a three-bit RRI. The RRI is essential information to interpretation of service frames in a receiver. Therefore, if a transmission error occurs, the receiver cannot interpret the service frames reliably. To allow the receiver to correct the transmission error in the RRI, the RRI is usually error correction coded.
FIG. 3 illustrates a conventional encoding apparatus for the encoder 100 in the HDR system shown in FIG. 1. Three-bit RRI values versus their codewords after error correction coding are shown in FIG. 3. For example, the encoder 100 can be a memory for storing a series of RRI values and their codewords after error correction coding.
As shown in FIG. 3, the RRI values from 0 to 7 are expressed in three binary bits ranging from 000 to 111. An (8, 3) orthogonal encoder 300 outputs an eight-symbol RRI codeword for the input of an RRI value. That is, a three-bit RRI value is input to the encoder 100 and a code of length 8 is selected from a memory (or another storage) according to the input RRI value. A minimum distance between codes is 4 in the orthogonal encoder 300. After the code symbols are repeated 31 times (each code symbol occurs 32 consecutive times) in the repeater 110 of FIG. 1, the minimum distance is 128 (=4×32) from the viewpoint of a (256, 3) code.
The error correction capability of binary linear codes is determined by the minimum distance between linear codes. For details of a minimum distance between binary linear codes as optimum codes, see “An Updated Table of Minimum-Distance Bounds for Binary Linear Codes”, A. E. Brouwer and Tom Verhoeff, IEEE Transactions on Information Theory, Vol. 39, No. 2, March 1993.
If input information (e.g., an RRI value) is three bits and an output codeword is 256 bits, the minimum distance between codes required for optimum codes is 146 according to the above document. However, since the minimum distance between codes in the conventional encoding apparatus is 128, no optimum codes exist for error correction coding. Thus, the probability of the transmission information having errors is great in the same channel environment. In addition, if data frames are decoded based on a wrong data rate due to errors in the transmission information, the error rate of the data frames will increase. Therefore, it is important to minimize an error rate in an error correction encoder.